Why is the ET-SoC-1 low power?

Against the A100's fp32 CUDA-core datasheet figure instead (19.5 TFLOPS at 400 W, 20.5 pJ per FLOP, no tensor cores), this card's 7.0 pJ is about 2.9× better; the matmul efficiency report, whose faster kernel ran ±1 and ±2 operands at 57 W, puts it at 3.4×. The verdict depends on which precision the GPU is allowed. Per transistor and per square millimetre the ET-SoC-1 really is cooler, by 2.3 and 3.6 times. The rest of this report asks where that comes from.

Esperanto's target row: by P/(V²f), 10 mW at 0.425 V and 1 GHz is 0.055 nF, so the slide's 0.040 nF would leave about 3 mW for the leakage its equation includes. The measured rows are power over idle, which leaves leakage out.

The same workloads on three cards, 26 September (the claims check, four runs each; board power at the temperature each card is reduced at: aifoundry2 and aifoundry1-c1 80.9 °C, aifoundry3 55.8 °C). The idle subtracted from each run is read at its actual launch (whole-degree readings averaging 80.1, 57.4 and 80.0 °C), so the values over idle are off by the leakage slope times the gap between the die temperature at launch and the reference (post-data note C2). The reading cannot say where in its degree the die was: if each launch came on a downward step of it, as the references' launches did (die = reading + 0.96 °C), the values read 0.15 W low on aifoundry2, 1.43 W low on aifoundry3 and 0.05 W low on aifoundry1-c1; if the reading is the die temperature, 0.62 W high, 0.91 W low and 0.73 W high. That matters most for the smallest rows: at the die temperature of each launch the integer loop adds 0.8–1.6, 1.3–1.9 and 0.0–0.8 W and zeros 1.1–1.9, 1.7–2.2 and 0.4–1.2 W. The capacitance uses each card's own minion voltage under load.

Switching is C·V²·f with each workload's capacitance measured at 0.517 V and 600 MHz (the table in section 3), scaled by the share of minions active. The fp32 matmuls are split in the proportions of the Horace experiment's flip model. The fixed part and the leakage come from the idle law, in its best-fit split (20 to 29 W of leakage at 80 °C fits the idle data as well); the extra idle measured at 0.62 V is added in proportion between the two measured voltages. Outside 0.517–0.618 V leakage was not measured, so only switching is priced there. TensorLoad streams are left out: most of their watts are in DRAM, the PHY and the SRAM rail, which the minion supply's V and f do not describe.

• The general-purpose side is nearly free. 1,024 minions spinning in an integer loop add 1.46 W to the idle card: 1.4 mW per core, 8 pJ per instruction (this card, 21 September, two runs). The three-card check measured 1.5 W [0.6, 2.4] on this card, 0.4 W [−0.1, 0.9] on aifoundry3 and 0.7 W [−0.7, 2.1] on aifoundry1-c1 (four runs each): only this card's excludes zero. Those are the registered values, which carry each card's launch-temperature offset (post-data note C2, section 3's second table). At the die temperature of each launch the loop adds 0.8–1.6 W on this card, 1.3–1.9 W on aifoundry3 and 0.0–0.8 W on aifoundry1-c1 over the note's two readings of the whole-degree launch temperature; with the intervals the registered item computes, only this card's excludes zero, and only if the launches came on a downward step of the reading (1.6 W [0.6, 2.5]; 0.8 W [−0.1, 1.7] if the reading is the die temperature). That loop, four adds and a branch, issues about 0.3 instructions per cycle on hart 0; the energy manual's tighter addi loop draws about 1.9 mW per minion on one hart (1.87 mW on this card; 1.9–2.0 W for 1,024 minions on each of the three cards) and 3.0 mW on both, and with both harts a nop or a fence costs 4.4–5.1 pJ per issue slot. Esperanto's claim that RISC-V compatibility costs little is borne out. A fully gated TensorFMA (zeros) costs 1.9 W for all cores on this card (1.9, 0.8 and 1.2 W on the three cards on 26 September; 1.1–1.9, 1.7–2.2 and 0.4–1.2 W at the die temperature of each launch); presumably the integer pipeline sleeps during a tensor instruction.
• Power is close to linear in active cores on this card: 25.6 mW per minion at 256 and 512 active, 26.2 at 768 and 27.0 at 1,024; a line through zero fits 26.5 mW per minion (21 September). The three-card check of 26 September found it superlinear: per active minion, 1,024 minions switch 9% more than 256 on this card (ratio 1.09 [0.75, 1.59]) and 24 and 25% more on aifoundry3 and aifoundry1-c1 (1.24 [1.10, 1.39] and 1.25 [1.01, 1.53]), outside the ±10% registered as linear. In the fp32 matmul idle cores cost nothing measurable: on every card a line through 256, 512 and 1,024 minions meets zero minions 0.9 to 2.1 W below the card's idle, so there is no floor above it. The integer loop is the exception: 0.54 W on 256 minions and 1.46 W on 1,024 (this card, 21 September, two runs each) put its line through zero minions at about 0.24 W.
• Gating follows the data. At the same FLOPs the fp32 matmul adds 1.9 W on zeros, 10.6 W on ones and 27.6 W on random values (1.9, 9.7 and 24.9 W on aifoundry3, 22 September). A multiply-add whose operand is zero gets no valid bit and clocks no register; a constant clocks registers but toggles no data. The Horace experiment predicts these from the RTL to 0.5 W rms in one session, 0.9 to 1.0 W on the three-card check's patterns (section 3), and 14 structured matrices priced before they ran to 0.9 W rms (section 9).
• Precision is the biggest lever inside the chip. On random data an int8 multiply-add costs 0.32 pJ over idle, fp16 2.7 pJ and fp32 6.0 pJ: a factor of 19 between int8, the type the chip was built for, and fp32. It held on all three cards on 26 September: 0.31, 2.7 and 5.9 pJ on this card, 0.26, 2.4 and 5.4 pJ on aifoundry3 and 0.31, 2.7 and 6.1 pJ on aifoundry1-c1, with fp32 over int8 18.9 [18.3, 19.5], 20.5 [19.0, 22.0] and 19.6 [17.9, 21.5] times. The int8 unit also runs 6.9 times more multiply-adds per second (51 per cycle per minion against 7.5).

• The card has three operating points (600, 700 and 800 MHz); on random data the two ends differ about as CV²f says. This is aifoundry2 alone, in the seven cool-start runs of one morning (21 September; see Caveats). From a cool die the firmware's clock governor runs kernels at 800 MHz and 0.62 V; past 65 °C, or 65 W at the board, it steps back down to 600 MHz and 0.52 V. Random fp32, at nearly the same die temperature ( °C), draws W over idle at 800 MHz against W at 600 MHz: × the switching power for 1.33× the clock, where V²f predicts ×. Ones give × ( against W; their two runs' 800 MHz readings agree to 0.2 W). Zeros cannot test it: their two runs switch 4.0 and 4.5 W at 800 MHz, and the 600 MHz figure, W, comes from the 80 °C session, since from a cool die zeros barely left 800 MHz. Energy per operation rises about × for 33% more speed.
• Idle pays for voltage too: W at 0.62 V (two half-second stretches) against W at 0.52 V, both at °C, a quarter more for a tenth of a volt; how much of that is leakage and how much the always-running clocks was not measured.
• Extrapolated to a GPU's operating point, the same silicon is a GPU-class part. Random fp32 switches 27.6 W here; at 0.85 V and 1,410 MHz the same capacitance would switch 175 W, before leakage, which also grows with voltage. Esperanto's own model is in the same range: about 230 W at 0.85 V, 164 W at 0.75 V. This card's measured board power at 0.52 V is 47 W on ones, within the 44 to 49 W the curve gives there (depending on how its published points are interpolated), and 64 W on random fp32, above it; the curve is chip power at its own clock and workload.

Leakage and temperature

• Idle board power follows a law fitted to this card's idle readings: 0.65 W more per degree at 80 °C, with 20 to 29 W of the idle at 80 °C in leakage. The law, its checks on three cards and its split are in the DVFS report, §5 and the energy manual, §1.
• This is the term that keeps the measured card from Esperanto's headline. The minion, SRAM and NoC rails alone read 22 W with every multiply-add gated, at 80 °C (13.9 W on aifoundry3 at 56 °C). A cooler die and the 0.4 V operating point would both cut it: leakage falls exponentially with temperature and steeply with voltage.
• It also makes the card thermally fragile: leakage feeds its own heat back, which leaves a budget of about 3 W of sustained switching on this card's cooling (the Horace experiment, section 8).

Memory

• Moving data costs power too: on this card a TensorLoad stream from LPDDR4x at GB/s ( of the 119 GB/s these cards' DDR clock allows) adds W on a never-written buffer (end to end: DRAM, PHY, controller, mesh and cache fills), and one from the shire's own L2 at TB/s W (two 7 s runs each at 80 °C). Per byte, use the energy manual, §4, which has the values with bars on three cards: DRAM 114.6 pJ/B [89.0–141.3] at 600 MHz on buffers whose contents are not set (95 on zeros and 133 on random data by tensor load), the L2 2.6 pJ/B on aifoundry2, 2.8 on aifoundry3 and 3.9 on aifoundry1-c1.
• An A100's HBM moves 1,555 to 2,039 GB/s at peak, 13 to 17 times the 119 GB/s these cards' DDR clock allows (11 to 15 times the LPDDR4x datasheet maximum of 137 GB/s in the section 1 table). Esperanto's choice trades bandwidth per chip for power, cost and capacity, and gets bandwidth back by using six chips per card.

• No A100 was measured here. Its numbers are the datasheet's and Horace He's (one GPU, bf16 8192³ matmul, a 330 W limit). Its core voltage is not published; 0.85 V is an assumption, and the table gives the range. Nor is its clock under the 330 W cap: 1,410 MHz is an upper bound.
• Everything is board power, LPDDR4x, regulators and PCIe included (Limits of observability, section 4.2).
• The 800 MHz figures come from seven short runs on one morning in which the governor changed the clock within seconds. Each is the highest board reading before the governor stepped down; random data held 800 MHz for at most 0.3 s, and the two of its three runs that caught a reading there agree to 0.3 W. Each is a single highest reading over an idle level that moves with the die temperature (the 600 MHz idle alone by about W per degree at 64–66 °C), so random data's and ones' above V²f are as close as these runs can test it. They deserve a dedicated run from a cool die (tools/ettelem/run_vf_cold.sh is written for it), which only hours idle in a cool room give (next item). They are also one card's: aifoundry3 stays at 600 MHz (a boot service sets its TDP to 0 W), and aifoundry1-c1's governor does not raise its clock, even busy on a die of 64 °C or less (the DVFS report, section 3).
• The card sits in a desktop chassis: left alone it read 62 °C after the night of 20–21 September and 73 °C after 20.6 hours on a warmer 22 September (one reading each), and every run here launched at 80 °C. In a server airflow it would presumably run cooler and leak less.
• Mostly one card. The three-card check of 26 September repeated the ablation configurations on aifoundry2, aifoundry3 and aifoundry1-c1, four runs each. aifoundry1-c1, launched at this card's 80 °C, switched 1% more than it on the fp32 operand patterns (least squares over eight patterns); aifoundry3, launched 23 °C cooler, switched 10% less. Most of that 10% is the reduction, not the card (post-data note C2): at the same die temperature aifoundry3 switches 3–4% less (0.958–0.969) and aifoundry1-c1 0.4% more (1.004), as the energy manual's independent catalogue ratio, 0.972, found. A test at two launch temperatures on each card could not say whether the rest is the card or its temperature (the Horace experiment, section 10; the DVFS report, section 6), so the capacitances here are this card's at 80 °C; where the others ran the same measurement their values are given beside them. Every card's registered switching values carry that launch-temperature offset; section 3's second table gives its size, which matters most for the smallest values, the integer loop and zeros.

• Evidence: this page rests on aifoundry2's card. The claims check of 26 September repeated the ablation configurations (precisions, data, active minions, the integer loop) on aifoundry2, aifoundry3 and aifoundry1-c1, four runs each, and its values are given beside the claims it tested and in section 3's second table; the 800 MHz points and the long runs are aifoundry2 only. Counts of runs are given where they are fewer than three. The tests and intervals are in the claims-check record.
• Every configuration ran twice for 7 s under the strict start of the Horace experiment (heat to 84 °C if below, idle to the 81→80 °C step, launch), in shuffled order, with 10 Hz telemetry. Power is the mean over seconds 1 to 3 moved to the launch temperature with the measured leakage slope. Repeats agree to 0.05 W for most configurations (this session; in the check's four runs per configuration and card, half the range of a configuration's runs was 0.08 to 0.21 W in the median over the three cards, and up to 0.5 W). These are the ablation session's values (random fp32 W at the launch temperature). The Horace experiment's strict session the same day quotes 63.4 W (+27.1 W over idle): the two sessions agree to 0.2 W, and the pages quote 63.9 and 63.4 W because they move power to the launch temperature with different leakage slopes, 0.68 W per degree here and 0.81 there.
• Commands: tools/ettelem/run_ablation.sh build/ablation1 tools/ettelem/ablation.cfg 2 7, then tools/ettelem/analyze_ablation.py. tools/ettelem/finish_horace.sh rebuilds this page and the Horace experiment from the data kept in the repository. Measurements used tools/ettelem, workloads/sparsity and the RTL flip counts of rtl-sim/fma_toggle.
• Data, all in docs/reports/data/2026-09-21-horace-aifoundry2/: ablation.json and ablation.txt (every configuration's runs), vf.json (the two operating points, from tools/ettelem/build_vf.py) and model.json (the idle law and the flip model). Notes and quotes: docs/research/why-low-power.md, written on 20–21 September; where its measured numbers differ, this page supersedes them.
• Firmware: the governor's source was read at et-platform 353f20e; the card's own trace strings match an older build (before et-platform commit 60b40c10f, 24 September 2024). The cards' own build (BL2 0.20.0 of release 1.3.1, et-platform ffca4cbb4) was read on 27 September: its thermal response is a blocking loop of steps about 0.4 s apart that also acts on an idle card, and a climb goes to the top point in one call (the DVFS report). The three operating points show in this card's telemetry.
• D. Ditzel et al., "Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto's ET-SoC-1 Chip", Hot Chips 33 slides, 2021, and IEEE Micro 42(3), 2022.
• NVIDIA A100 datasheet. H. He, "Strangely, Matrix Multiplications on GPUs Run Faster When Given 'Predictable' Data!", 2024.
• Versions. 21 September 2026: first published. 24 September: corrected after review (the card's three operating points, the A100's clock under its cap, the fp16 comparison, the thermal budget's dependence on the day). 25 September: the V²f check restated on random data; then version 3, every claim checked against both cards (the leakage headline became the measured slope with the split as a range; the energies per byte are the energy manual's). 26 September (version 4): the three-card check's values beside the tested claims; the linearity in active cores and the integer loop per card. 27 September: the review's fixes ("brackets" corrected; the integer loop's floor) and a capacitance ladder. 28 September: aifoundry1-c1's governor never raised the clock; later, the review's cuts. What each version changed in full: this page's history in the repository.